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* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das2018-11-121-0/+11
* [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das2018-11-121-1/+2
* [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das2018-11-121-0/+2
* AArch64: Constraint disassembler and assembler changes.Tamar Christina2018-10-031-1/+33
* AArch64: Wire through instr_sequenceTamar Christina2018-10-031-1/+2
* Implement Read/Write constraints on system registers on AArch64Tamar Christina2018-05-151-0/+31
* Modify AArch64 Assembly and disassembly functions to be able to fail and repo...Tamar Christina2018-05-151-186/+248
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* Correct disassembly of dot product instructions.Tamar Christina2017-12-191-1/+1
* Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina2017-11-091-0/+30
* [AArch64] Add dot product support for AArch64 to binutilsTamar Christina2017-06-281-0/+14
* Don't compare boolean values against TRUE or FALSEAlan Modra2017-05-181-3/+2
* [AArch64] Additional SVE instructionsRichard Sandiford2017-02-241-30/+48
* aarch64: actually copy first operand in convert_bfc_to_bfm()Jan Beulich2017-02-221-2/+2
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* AArch64/opcodes: Correct another `index' global shadowing errorMaciej W. Rozycki2016-12-081-8/+8
* [AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy2016-11-181-3/+47
* [AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy2016-11-181-0/+24
* [AArch64] PR target/20666, fix wrong encoding of new introduced BFC pseudoJiong Wang2016-10-111-1/+1
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-211-0/+43
* [AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford2016-09-211-0/+84
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-211-0/+45
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-211-6/+91
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-211-0/+50
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-211-0/+108
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-211-0/+13
* [AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford2016-09-211-0/+27
* [AArch64][SVE 16/32] Use specific insert/extract methods for fpimmRichard Sandiford2016-09-211-0/+10
* [AArch64][SVE 15/32] Add {insert,extract}_all_fields helpersRichard Sandiford2016-09-211-7/+21
* [AArch64][SVE 14/32] Make aarch64_logical_immediate_p take an element sizeRichard Sandiford2016-09-211-2/+2
* Copyright update for binutilsAlan Modra2016-01-011-1/+1
* [AArch64][Patch 4/5] Support HINT aliases taking operands.Matthew Wahab2015-12-111-0/+13
* [AArch64] Add ARMv8.2 instructions BFC and REV64.Matthew Wahab2015-11-271-0/+34
* ChangeLog rotatation and copyright year updateAlan Modra2015-01-021-1/+1
* [PATCH/AArch64] Implement LSE featureJiong Wang2014-09-031-0/+8
* Update copyright yearsAlan Modra2014-03-051-1/+1
* PR binutils/15834Nick Clifton2013-08-231-2/+2
* gas/Yufeng Zhang2013-05-131-1/+0
* include/opcode/Yufeng Zhang2013-01-301-1/+17
* include/opcode/Yufeng Zhang2013-01-171-1/+5
* * aarch64-asm.c (aarch64_ins_ldst_reglist): InitializeKai Tietz2012-10-181-5/+5
* 2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>Richard Earnshaw2012-09-171-5/+6
* Add support for 64-bit ARM architecture: AArch64Nick Clifton2012-08-131-0/+1268