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* Add .cfi_val_offset GAS command.Andreas Krebbel2016-09-296-0/+76
* Disallow 3-operand cmp[l][i] for ppc64Alan Modra2016-09-294-4/+12
* tc-xtensa.c: fixup xg_reverse_shift_count typoTrevor Saunders2016-09-262-1/+6
* When building target binaries, ensure that the warning flags selected for the...Vlad Zakharov2016-09-264-6/+58
* PowerPC .gnu.attributesAlan Modra2016-09-262-0/+29
* Remove legacy basepri_mask MRS/MSR special regThomas Preud'homme2016-09-222-1/+5
* [AArch64] Print spaces after commas in addressesRichard Sandiford2016-09-2116-9612/+9633
* [AArch64] Use "must" rather than "should" in error messagesRichard Sandiford2016-09-216-80/+90
* [AArch64] Add SVE condition codesRichard Sandiford2016-09-2111-69/+228
* Fix misplaced ChangeLogRichard Sandiford2016-09-212-11/+15
* [AArch64][SVE 32/32] Add SVE testsRichard Sandiford2016-09-2115-0/+79428
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-213-1/+27
* [AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford2016-09-212-0/+11
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-212-3/+44
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-212-0/+32
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-212-15/+68
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-212-23/+237
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-212-1/+49
* [AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford2016-09-212-0/+71
* [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford2016-09-212-4/+61
* [AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford2016-09-212-31/+148
* [AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford2016-09-212-0/+10
* [AArch64][SVE 13/32] Add an F_STRICT flagRichard Sandiford2016-09-212-4/+6
* [AArch64][SVE 12/32] Remove boolean parameters from parse_address_mainRichard Sandiford2016-09-214-24/+57
* [AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64 interfaceRichard Sandiford2016-09-215-339/+371
* [AArch64][SVE 10/32] Move range check out of parse_aarch64_imm_floatRichard Sandiford2016-09-212-8/+11
* [AArch64][SVE 09/32] Improve error messages for invalid floatsRichard Sandiford2016-09-214-6/+34
* [AArch64][SVE 08/32] Generalise aarch64_double_precision_fmovableRichard Sandiford2016-09-212-33/+37
* [AArch64][SVE 07/32] Replace hard-coded uses of REG_TYPE_R_Z_BHSDQ_VRichard Sandiford2016-09-212-22/+43
* [AArch64][SVE 06/32] Generalise parse_neon_reg_listRichard Sandiford2016-09-212-5/+15
* [AArch64][SVE 05/32] Rename parse_neon_type_for_operandRichard Sandiford2016-09-212-2/+8
* [AArch64][SVE 04/32] Rename neon_type_el to vector_type_elRichard Sandiford2016-09-212-16/+29
* [AArch64][SVE 03/32] Rename neon_el_type to vector_el_typeRichard Sandiford2016-09-212-4/+12
* [AArch64][SVE 01/32] Remove parse_neon_operand_typeRichard Sandiford2016-09-212-27/+9
* [ARC] Disassemble correctly extension instructions.Claudiu Zissulescu2016-09-163-0/+27
* gas: run the sparc test dcti-couples-v9 only in ELF targets.Jose E. Marchesi2016-09-152-1/+7
* Modify POWER9 support to match final ISA 3.0 documentation.Peter Bergner2016-09-143-65/+19
* gas: improve architecture mismatch diagnostics in sparcJose E. Marchesi2016-09-142-1/+6
* gas: detect DCTI couples in sparcJose E. Marchesi2016-09-1411-18/+133
* [ARC] Fix parsing dtpoff relocation expression.Claudiu Zissulescu2016-09-144-1/+30
* S/390: Add alternate processor names.Andreas Krebbel2016-09-124-29/+70
* S/390: Fix facility bit default.Andreas Krebbel2016-09-122-1/+8
* S/390: Fix kmctr instruction type.Patrick Steuer2016-09-122-1/+5
* Allow PROCESSOR_IAMCU for Intel MCUH.J. Lu2016-09-082-1/+6
* X86: Allow additional ISAs for IAMCU in assemblerH.J. Lu2016-09-0711-30/+50
* [arm] Automatically enable CRC instructions on supported ARMv8-A CPUs.Richard Earnshaw2016-09-072-9/+14
* PowerPC VLE sh_flags and p_flagsAlan Modra2016-08-312-5/+15
* opcodes, gas: fix mnemonic of sparc camellia_flJose E. Marchesi2016-08-263-2/+8
* Add missing ARMv8-M special registersThomas Preud'homme2016-08-266-66/+337
* Remove _S version of ARM MSR/MRS special registersThomas Preud'homme2016-08-256-34/+12