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authorJan Beulich <jbeulich@suse.com>2019-11-11 13:28:35 +0100
committerJan Beulich <jbeulich@suse.com>2019-11-11 13:28:35 +0100
commit91802f3cfed1524ebcfef1057afad4f98519ca78 (patch)
tree3ed6ef5c73754fd451a015a5566a3a8a741b9038 /intl
parentArm64: fix build with old glibc (diff)
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Arm64: SVE2's smaxp/sminp require operands 1 and 3 to be the same register
This is just like for their umaxp/uminp and fmaxp/fminp counterparts.
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