summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSam James <sam@gentoo.org>2024-07-13 20:04:00 +0100
committerSam James <sam@gentoo.org>2024-07-13 20:05:07 +0100
commit6e14169d7ff552b61714ecb212f11cec0bd7a3f0 (patch)
tree3271687ea12ec0d920fe7391353bb02e418c4c4f /dev-cpp
parentapp-text/marknote: new package, add 1.3.0 (diff)
downloadgentoo-6e14169d7ff552b61714ecb212f11cec0bd7a3f0.tar.gz
gentoo-6e14169d7ff552b61714ecb212f11cec0bd7a3f0.tar.bz2
gentoo-6e14169d7ff552b61714ecb212f11cec0bd7a3f0.zip
dev-cpp/xsimd: add 13.0.0, including backports needed by media-gfx/krita
See https://mail.kde.org/pipermail/distributions/2024-July/001511.html. Signed-off-by: Sam James <sam@gentoo.org>
Diffstat (limited to 'dev-cpp')
-rw-r--r--dev-cpp/xsimd/Manifest1
-rw-r--r--dev-cpp/xsimd/files/xsimd-13.0.0-detection-simd-with-mitigations.patch148
-rw-r--r--dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch88
-rw-r--r--dev-cpp/xsimd/xsimd-13.0.0.ebuild60
4 files changed, 297 insertions, 0 deletions
diff --git a/dev-cpp/xsimd/Manifest b/dev-cpp/xsimd/Manifest
index 70aa1f59c986..b126af725d2e 100644
--- a/dev-cpp/xsimd/Manifest
+++ b/dev-cpp/xsimd/Manifest
@@ -1,2 +1,3 @@
DIST xsimd-11.1.0.tar.gz 219350 BLAKE2B 2bbbc4f7dbe489a407fe798b146c008aba44664efc943c2e1507d5c6e7da2a03ed91abf0d872e5abf9bd94be3e76bef276ec5b47d4e356b42a7b4c680bd6f3d9 SHA512 3a6141dfa4d95a977f4222880dfd06197613d153a78a84653022423279eec037ea9def08ae225aba7231c0b2c434ab7c907c965f8367fb0db9b96113980b51f3
DIST xsimd-12.1.1.tar.gz 253141 BLAKE2B 29efbb045d8ade8737d702a73f3d0a912111dd4fbc84485c0e54c8b06d73edbb4b85f4b51e24da9bed0dea010b0cce9d99b57e20e8b94d3daf90d46031548eb9 SHA512 8e45a8e9b28358d5f20f713ea19a8c366edc62790c27984149f283dfe808d78a549c8ec465e8b3677d7e30b2cb80093908de364bbb9dc80683f5fdfb843131e1
+DIST xsimd-13.0.0.tar.gz 259967 BLAKE2B 63267c75a7e8ed2e8689a912e79a1d012ff3cf3813969f97a640801e372ec9e66a6e3d3034b6918a30dc3374e8211fd1107f1309156354b6bca6ba17c6f132b4 SHA512 cdc42ddad3353297cf25ea2b6b3f09967f5f388efc26241f2997979fdbbac072819ff771145bc5bfa86cb326cca84b4119e8e6e3f658407961cf203a40603a7f
diff --git a/dev-cpp/xsimd/files/xsimd-13.0.0-detection-simd-with-mitigations.patch b/dev-cpp/xsimd/files/xsimd-13.0.0-detection-simd-with-mitigations.patch
new file mode 100644
index 000000000000..6aab22cd8416
--- /dev/null
+++ b/dev-cpp/xsimd/files/xsimd-13.0.0-detection-simd-with-mitigations.patch
@@ -0,0 +1,148 @@
+https://mail.kde.org/pipermail/distributions/2024-July/001511.html
+https://github.com/xtensor-stack/xsimd/commit/96edf0340492fa9c080f5182b38358ca85baef5e
+
+From 96edf0340492fa9c080f5182b38358ca85baef5e Mon Sep 17 00:00:00 2001
+From: Dmitry Kazakov <dimula73@gmail.com>
+Date: Tue, 28 May 2024 22:21:08 +0200
+Subject: [PATCH] Fix detection of SSE/AVX/AVX512 when they are explicitly
+ disabled by OS
+
+Some CPU vulnerability mitigations may disable AVX functionality
+on the hardware level via the XCR0 register. We should check that
+manually to verify that OS actually allows us to use this feature.
+
+See https://bugs.kde.org/show_bug.cgi?id=484622
+
+Fix #1025
+---
+ include/xsimd/config/xsimd_cpuid.hpp | 91 ++++++++++++++++++++++------
+ 1 file changed, 72 insertions(+), 19 deletions(-)
+
+diff --git a/include/xsimd/config/xsimd_cpuid.hpp b/include/xsimd/config/xsimd_cpuid.hpp
+index f22089bac..6dda3be09 100644
+--- a/include/xsimd/config/xsimd_cpuid.hpp
++++ b/include/xsimd/config/xsimd_cpuid.hpp
+@@ -114,6 +114,35 @@ namespace xsimd
+ #endif
+
+ #elif defined(__x86_64__) || defined(__i386__) || defined(_M_AMD64) || defined(_M_IX86)
++
++ auto get_xcr0_low = []() noexcept
++ {
++ uint32_t xcr0;
++
++#if defined(_MSC_VER) && _MSC_VER >= 1400
++
++ xcr0 = (uint32_t)_xgetbv(0);
++
++#elif defined(__GNUC__)
++
++ __asm__(
++ "xorl %%ecx, %%ecx\n"
++ "xgetbv\n"
++ : "=a"(xcr0)
++ :
++#if defined(__i386__)
++ : "ecx", "edx"
++#else
++ : "rcx", "rdx"
++#endif
++ );
++
++#else /* _MSC_VER < 1400 */
++#error "_MSC_VER < 1400 is not supported"
++#endif /* _MSC_VER && _MSC_VER >= 1400 */
++ return xcr0;
++ };
++
+ auto get_cpuid = [](int reg[4], int level, int count = 0) noexcept
+ {
+
+@@ -148,19 +177,43 @@ namespace xsimd
+
+ get_cpuid(regs1, 0x1);
+
+- sse2 = regs1[3] >> 26 & 1;
+- sse3 = regs1[2] >> 0 & 1;
+- ssse3 = regs1[2] >> 9 & 1;
+- sse4_1 = regs1[2] >> 19 & 1;
+- sse4_2 = regs1[2] >> 20 & 1;
+- fma3_sse42 = regs1[2] >> 12 & 1;
++ // OS can explicitly disable the usage of SSE/AVX extensions
++ // by setting an appropriate flag in CR0 register
++ //
++ // https://docs.kernel.org/admin-guide/hw-vuln/gather_data_sampling.html
++
++ unsigned sse_state_os_enabled = 1;
++ unsigned avx_state_os_enabled = 1;
++ unsigned avx512_state_os_enabled = 1;
++
++ // OSXSAVE: A value of 1 indicates that the OS has set CR4.OSXSAVE[bit
++ // 18] to enable XSETBV/XGETBV instructions to access XCR0 and
++ // to support processor extended state management using
++ // XSAVE/XRSTOR.
++ bool osxsave = regs1[2] >> 27 & 1;
++ if (osxsave)
++ {
++
++ uint32_t xcr0 = get_xcr0_low();
++
++ sse_state_os_enabled = xcr0 >> 1 & 1;
++ avx_state_os_enabled = xcr0 >> 2 & sse_state_os_enabled;
++ avx512_state_os_enabled = xcr0 >> 6 & avx_state_os_enabled;
++ }
++
++ sse2 = regs1[3] >> 26 & sse_state_os_enabled;
++ sse3 = regs1[2] >> 0 & sse_state_os_enabled;
++ ssse3 = regs1[2] >> 9 & sse_state_os_enabled;
++ sse4_1 = regs1[2] >> 19 & sse_state_os_enabled;
++ sse4_2 = regs1[2] >> 20 & sse_state_os_enabled;
++ fma3_sse42 = regs1[2] >> 12 & sse_state_os_enabled;
+
+- avx = regs1[2] >> 28 & 1;
++ avx = regs1[2] >> 28 & avx_state_os_enabled;
+ fma3_avx = avx && fma3_sse42;
+
+ int regs8[4];
+ get_cpuid(regs8, 0x80000001);
+- fma4 = regs8[2] >> 16 & 1;
++ fma4 = regs8[2] >> 16 & avx_state_os_enabled;
+
+ // sse4a = regs[2] >> 6 & 1;
+
+@@ -168,23 +221,23 @@ namespace xsimd
+
+ int regs7[4];
+ get_cpuid(regs7, 0x7);
+- avx2 = regs7[1] >> 5 & 1;
++ avx2 = regs7[1] >> 5 & avx_state_os_enabled;
+
+ int regs7a[4];
+ get_cpuid(regs7a, 0x7, 0x1);
+- avxvnni = regs7a[0] >> 4 & 1;
++ avxvnni = regs7a[0] >> 4 & avx_state_os_enabled;
+
+ fma3_avx2 = avx2 && fma3_sse42;
+
+- avx512f = regs7[1] >> 16 & 1;
+- avx512cd = regs7[1] >> 28 & 1;
+- avx512dq = regs7[1] >> 17 & 1;
+- avx512bw = regs7[1] >> 30 & 1;
+- avx512er = regs7[1] >> 27 & 1;
+- avx512pf = regs7[1] >> 26 & 1;
+- avx512ifma = regs7[1] >> 21 & 1;
+- avx512vbmi = regs7[2] >> 1 & 1;
+- avx512vnni_bw = regs7[2] >> 11 & 1;
++ avx512f = regs7[1] >> 16 & avx512_state_os_enabled;
++ avx512cd = regs7[1] >> 28 & avx512_state_os_enabled;
++ avx512dq = regs7[1] >> 17 & avx512_state_os_enabled;
++ avx512bw = regs7[1] >> 30 & avx512_state_os_enabled;
++ avx512er = regs7[1] >> 27 & avx512_state_os_enabled;
++ avx512pf = regs7[1] >> 26 & avx512_state_os_enabled;
++ avx512ifma = regs7[1] >> 21 & avx512_state_os_enabled;
++ avx512vbmi = regs7[2] >> 1 & avx512_state_os_enabled;
++ avx512vnni_bw = regs7[2] >> 11 & avx512_state_os_enabled;
+ avx512vnni_vbmi = avx512vbmi && avx512vnni_bw;
+ #endif
+ }
+
diff --git a/dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch b/dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch
new file mode 100644
index 000000000000..38ea56d1baa2
--- /dev/null
+++ b/dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch
@@ -0,0 +1,88 @@
+https://mail.kde.org/pipermail/distributions/2024-July/001511.html
+https://github.com/xtensor-stack/xsimd/commit/80a59235e3ffa51659aaa06f002bfd088b77023c
+
+From 80a59235e3ffa51659aaa06f002bfd088b77023c Mon Sep 17 00:00:00 2001
+From: Dmitry Kazakov <dimula73@gmail.com>
+Date: Fri, 14 Jun 2024 10:19:55 +0200
+Subject: [PATCH] Fix xsimd::available_architectures().has() for sve and rvv
+ archs
+
+Ideally the patch CPU detection code should also check if the length
+of SVE and RVV is actually supported by the current CPU implementation
+(i.e. ZCR_Elx.LEN register for SVE and something else for RVV), but
+I don't have such CPUs/emulators handy, so I cannot add such checks.
+
+Given that xsimd::available_architectures().has() is a new feature
+of XSIMD13 and the length check has never been present in XSIMD, this
+bug is not a regression at least.
+
+The patch also adds a unittest that reproduces the error the patch fixes
+---
+ include/xsimd/config/xsimd_cpuid.hpp | 12 ++++++++++--
+ test/test_arch.cpp | 15 +++++++++++++++
+ 2 files changed, 25 insertions(+), 2 deletions(-)
+
+diff --git a/include/xsimd/config/xsimd_cpuid.hpp b/include/xsimd/config/xsimd_cpuid.hpp
+index 6dda3be09..8021fceb8 100644
+--- a/include/xsimd/config/xsimd_cpuid.hpp
++++ b/include/xsimd/config/xsimd_cpuid.hpp
+@@ -42,6 +42,10 @@ namespace xsimd
+ #define ARCH_FIELD_EX(arch, field_name) \
+ unsigned field_name; \
+ XSIMD_INLINE bool has(::xsimd::arch) const { return this->field_name; }
++
++#define ARCH_FIELD_EX_REUSE(arch, field_name) \
++ XSIMD_INLINE bool has(::xsimd::arch) const { return this->field_name; }
++
+ #define ARCH_FIELD(name) ARCH_FIELD_EX(name, name)
+
+ ARCH_FIELD(sse2)
+@@ -72,8 +76,12 @@ namespace xsimd
+ ARCH_FIELD(neon)
+ ARCH_FIELD(neon64)
+ ARCH_FIELD_EX(i8mm<::xsimd::neon64>, i8mm_neon64)
+- ARCH_FIELD(sve)
+- ARCH_FIELD(rvv)
++ ARCH_FIELD_EX(detail::sve<512>, sve)
++ ARCH_FIELD_EX_REUSE(detail::sve<256>, sve)
++ ARCH_FIELD_EX_REUSE(detail::sve<128>, sve)
++ ARCH_FIELD_EX(detail::rvv<512>, rvv)
++ ARCH_FIELD_EX_REUSE(detail::rvv<256>, rvv)
++ ARCH_FIELD_EX_REUSE(detail::rvv<128>, rvv)
+ ARCH_FIELD(wasm)
+
+ #undef ARCH_FIELD
+diff --git a/test/test_arch.cpp b/test/test_arch.cpp
+index b42073358..f1f50d546 100644
+--- a/test/test_arch.cpp
++++ b/test/test_arch.cpp
+@@ -38,6 +38,16 @@ struct check_supported
+ }
+ };
+
++struct check_cpu_has_intruction_set
++{
++ template <class Arch>
++ void operator()(Arch arch) const
++ {
++ static_assert(std::is_same<decltype(xsimd::available_architectures().has(arch)), bool>::value,
++ "cannot test instruction set availability on CPU");
++ }
++};
++
+ struct check_available
+ {
+ template <class Arch>
+@@ -71,6 +81,11 @@ TEST_CASE("[multi arch support]")
+ xsimd::supported_architectures::for_each(check_supported {});
+ }
+
++ SUBCASE("xsimd::available_architectures::has")
++ {
++ xsimd::all_architectures::for_each(check_cpu_has_intruction_set {});
++ }
++
+ SUBCASE("xsimd::default_arch::name")
+ {
+ constexpr char const* name = xsimd::default_arch::name();
+
diff --git a/dev-cpp/xsimd/xsimd-13.0.0.ebuild b/dev-cpp/xsimd/xsimd-13.0.0.ebuild
new file mode 100644
index 000000000000..41414ef626b6
--- /dev/null
+++ b/dev-cpp/xsimd/xsimd-13.0.0.ebuild
@@ -0,0 +1,60 @@
+# Copyright 2023-2024 Gentoo Authors
+# Distributed under the terms of the GNU General Public License v2
+
+EAPI=8
+
+inherit cmake
+
+DESCRIPTION="C++ wrappers for SIMD intrinsics"
+HOMEPAGE="https://github.com/xtensor-stack/xsimd"
+SRC_URI="https://github.com/xtensor-stack/${PN}/archive/refs/tags/${PV}.tar.gz
+ -> ${P}.tar.gz"
+
+LICENSE="BSD"
+SLOT="0"
+KEYWORDS="~amd64 ~arm ~arm64 ~hppa ~loong ~ppc ~ppc64 ~riscv ~s390 ~sparc ~x86"
+IUSE="doc test"
+RESTRICT="!test? ( test )"
+
+BDEPEND="
+ doc? (
+ app-text/doxygen
+ dev-python/breathe
+ dev-python/sphinx
+ dev-python/sphinx-rtd-theme
+ )
+ test? ( dev-cpp/doctest )"
+
+PATCHES=(
+ "${FILESDIR}"/${PN}-11.1.0-c++17.patch
+ "${FILESDIR}"/${PN}-12.1.1-no-march.patch
+ "${FILESDIR}"/${PN}-13.0.0-sve-rvv.patch
+ "${FILESDIR}"/${PN}-13.0.0-detection-simd-with-mitigations.patch
+)
+
+src_prepare() {
+ sed -i \
+ -e '/fPIC/d' \
+ test/CMakeLists.txt \
+ || die
+ cmake_src_prepare
+}
+
+src_configure() {
+ local mycmakeargs=(
+ -DBUILD_TESTS=$(usex test)
+ )
+ cmake_src_configure
+}
+
+src_compile() {
+ cmake_src_compile
+ use doc && emake -C docs html
+}
+
+src_install() {
+ cmake_src_install
+ if use doc; then
+ dodoc -r docs/build/html
+ fi
+}