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path: root/include/opcode/aarch64.h
Commit message (Expand)AuthorAgeFilesLines
* [AArch64] Add SVE condition codesRichard Sandiford2016-09-211-1/+1
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-211-0/+13
* [AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford2016-09-211-0/+12
* [AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford2016-09-211-0/+6
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-211-0/+4
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-211-0/+21
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-211-0/+7
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-211-0/+39
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-211-1/+3
* [AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford2016-09-211-0/+5
* [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford2016-09-211-0/+3
* [AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford2016-09-211-0/+21
* [AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford2016-09-211-0/+9
* [AArch64][SVE 13/32] Add an F_STRICT flagRichard Sandiford2016-09-211-1/+3
* [AArch64] Fix +nofp16 handlingSzabolcs Nagy2016-07-011-4/+7
* [AArch64] Make register indices be full 64-bit valuesRichard Sandiford2016-06-281-3/+3
* Add support to AArch64 disassembler for verifying instructions. Add verifier...Nick Clifton2016-04-281-0/+3
* Copyright update for binutilsAlan Modra2016-01-011-1/+1
* [AArch64][PATCH 11/14] Add support for the 2H vector type.Matthew Wahab2015-12-141-0/+1
* [AArch64][Patch 5/5] Add instruction PSB CSYNCMatthew Wahab2015-12-111-0/+1
* [AArch64][Patch 4/5] Support HINT aliases taking operands.Matthew Wahab2015-12-111-0/+2
* [AArch64][Patch 1/5] Support the ARMv8.2 Statistical Profiling Extension.Matthew Wahab2015-12-111-0/+1
* [AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction.Matthew Wahab2015-12-101-0/+3
* [AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP instruction.Matthew Wahab2015-12-101-1/+3
* [AArch64][PATCH 1/2] Add support for RAS instruction ESB.Matthew Wahab2015-12-101-0/+2
* [AArch64] Fix ARMv8.1 and ARMv8.2 feature settings.Matthew Wahab2015-12-101-2/+5
* [AArch64] Add ARMv8.2 instructions BFC and REV64.Matthew Wahab2015-11-271-0/+1
* [AArch64] Add feature flags and command line for ARMv8.2 FP16 support.Matthew Wahab2015-11-271-0/+2
* [AArch64] Add support for ARMv8.1 Virtulization Host Extensions.Matthew Wahab2015-11-201-0/+2
* [AArch64] Add ARMv8.2 command line option and feature flag.Matthew Wahab2015-11-191-1/+9
* Pass noaliases_p to aarch64_decode_insnYao Qi2015-10-281-1/+1
* Avoid using 'template' C++ keywordYao Qi2015-10-071-1/+1
* Wrap include/opcode/aarch64.h in extern "C" for C++Yao Qi2015-10-071-0/+8
* Make aarch64_zero_register_p declaration starts from column oneYao Qi2015-10-021-2/+2
* [aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insnYao Qi2015-10-021-0/+3
* [AArch64] Add support for ARMv8.1 command line optionMatthew Wahab2015-06-041-0/+9
* [AArch64] Support for ARMv8.1a Adv.SIMD instructionsMatthew Wahab2015-06-021-0/+1
* [AArch64] Support for ARMv8.1a Limited Ordering Regions extensionMatthew Wahab2015-06-021-0/+1
* [AArch64][libopcode] Add support for PAN architecture extensionMatthew Wahab2015-06-011-0/+5
* ChangeLog rotatation and copyright year updateAlan Modra2015-01-021-1/+1
* [PATCH/AArch64] Implement LSE featureJiong Wang2014-09-031-2/+7
* Update copyright yearsAlan Modra2014-03-051-1/+1
* gas/testsuite/Yufeng Zhang2013-11-201-1/+1
* Revert "Add support for AArch64 trace unit registers."Yufeng Zhang2013-11-181-2/+0
* gas/Yufeng Zhang2013-11-151-0/+2
* gas/Yufeng Zhang2013-11-051-1/+10
* gas/Yufeng Zhang2013-11-051-0/+2
* include/opcode/Yufeng Zhang2013-02-281-0/+1
* include/opcode/Yufeng Zhang2013-01-301-1/+6
* include/opcode/Yufeng Zhang2013-01-171-2/+0