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* [gas][arm] Add -mwarn-restrict-itAndre Vieira2019-12-1110-8/+29
* x86: further refine SSE check (SSE4a, SHA, GFNI)Jan Beulich2019-12-117-25/+88
* [gas][arm] Set context table for '.arch_extension'Andre Vieira2019-12-104-0/+20
* x86/Intel: fold "xmmword" with "oword"Jan Beulich2019-12-092-11/+18
* x86/Intel: support "mmword ptr"Jan Beulich2019-12-097-5/+23
* x86/Intel: fix "near ptr" / "far ptr" handlingJan Beulich2019-12-094-3/+24
* x86/Intel: drop pointless suffix setting for "tbyte ptr"Jan Beulich2019-12-092-10/+11
* x86/Intel: drop pointless suffix setting for "fword ptr"Jan Beulich2019-12-092-2/+5
* x86/Intel: drop pointless special casing of LxSJan Beulich2019-12-092-6/+6
* aarch64*-*-*ilp32 gas testsAlan Modra2019-12-0814-36/+50
* [gas] Implement .cfi_negate_ra_state directiveKyrylo Tkachov2019-12-064-0/+53
* Arm64: simplify Crypto arch extension handlingJan Beulich2019-12-052-3/+6
* Arm64: correct "sha3" arch-extension directive handlingJan Beulich2019-12-057-45/+49
* x86-64: accept 64-bit LFS/LGS/LSS forms with suffix or operand size specifierJan Beulich2019-12-049-8/+90
* x86-64/Intel: fix CALL/JMP with dword operandJan Beulich2019-12-044-6/+31
* x86: consolidate tracking of MMX register useJan Beulich2019-12-042-9/+8
* x86/Intel: extend MOVDIRI testingJan Beulich2019-12-047-0/+23
* x86: make sure all PUSH/POP honor DefaultSizeJan Beulich2019-12-044-8/+40
* x86: drop some stray/bogus DefaultSizeJan Beulich2019-12-044-9/+94
* gas/riscv: Produce version 3 DWARF CIE by defaultAndrew Burgess2019-11-286-4/+51
* gas: Check for overflow on return column in version 1 CIE DWARFAndrew Burgess2019-11-285-1/+36
* binutils/gas/riscv: Add DWARF register numbers for CSRsAndrew Burgess2019-11-284-0/+531
* gas/riscv: Remove unneeded structureAndrew Burgess2019-11-282-7/+6
* Fix "psb CSYNC" and "bti C".Andrew Pinski2019-11-257-3/+25
* Introduce new section flag: SEC_ELF_OCTETSChristian Eggers2019-11-256-11/+52
* Reverts patches providing octet support in dwarfChristian Eggers2019-11-254-63/+22
* Arm: Change CRC from fpu feature to archititectural extensionMihail Ionescu2019-11-224-16/+62
* PR24944, gas doesn't read enough digits when parsing a floating point numberAlan Modra2019-11-204-8/+23
* gas: Add --gdwarf-cie-version command line flagAndrew Burgess2019-11-1813-2/+125
* x86: fold individual Jump* attributes into a single Jump oneJan Beulich2019-11-143-34/+41
* x86: make JumpAbsolute an insn attributeJan Beulich2019-11-143-21/+45
* x86: make AnySize an insn attributeJan Beulich2019-11-142-1/+5
* x86/Intel: correct CMPSD test cases' regexp closing paren placementJan Beulich2019-11-143-39/+45
* x86/Intel: extend MOVSD/CMPSD testsuite coverageJan Beulich2019-11-1410-0/+386
* RISC-V: Support the INSN_CLASS.*F.* classes for .insn directive.Jim Wilson2019-11-122-1/+5
* [gas][arm] Enable VLDM, VSTM, VPUSH, VPOP for MVEMihail Ionescu2019-11-124-44/+131
* [binutils][arm] Update the decoding of MVE VMOV, VMVNMihail Ionescu2019-11-124-2/+94
* [gas][arm] Make .fpu reset the FPU/Coprocessor feature bitsMihail Ionescu2019-11-125-2/+32
* x86: fold EsSeg into IsStringJan Beulich2019-11-122-34/+31
* x86: eliminate ImmExt abuseJan Beulich2019-11-1212-352/+343
* x86: introduce operand type "instance"Jan Beulich2019-11-122-29/+55
* Arm64: SVE2's smaxp/sminp require operands 1 and 3 to be the same registerJan Beulich2019-11-113-0/+10
* i386: Only check suffix in instruction mnemonicH.J. Lu2019-11-086-44/+69
* x86: convert RegMask and RegBND from bitfield to enumeratorJan Beulich2019-11-082-6/+13
* x86: convert RegSIMD and RegMMX from bitfield to enumeratorJan Beulich2019-11-082-43/+53
* x86: convert Control/Debug/Test from bitfield to enumeratorJan Beulich2019-11-082-14/+20
* x86: convert SReg from bitfield to enumeratorJan Beulich2019-11-083-9/+18
* x86: introduce operand type "class"Jan Beulich2019-11-082-41/+73
* [gas][aarch64] Add the v8.6 Data Gathering Hint mnemonic [10/X]Matthew Malcomson2019-11-073-0/+20
* [Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10]Matthew Malcomson2019-11-076-5/+171