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From d0cdd34dd815bf99c3f8a7bddfdde5ae59b0f0db Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= <roger.pau@citrix.com>
Date: Tue, 5 Sep 2023 08:47:34 +0200
Subject: [PATCH 18/55] x86/ioapic: sanitize IO-APIC pins before enabling lapic
LVTERR/ESR
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The current logic to init the local APIC and the IO-APIC does init the
local APIC LVTERR/ESR before doing any sanitization on the IO-APIC pin
configuration. It's already noted on enable_IO_APIC() that Xen
shouldn't trust the IO-APIC being empty at bootup.
At XenServer we have a system where the IO-APIC 0 is handed to Xen
with pin 0 unmasked, set to Fixed delivery mode, edge triggered and
with a vector of 0 (all fields of the RTE are zeroed). Once the local
APIC LVTERR/ESR is enabled periodic injections from such pin cause the
local APIC to in turn inject periodic error vectors:
APIC error on CPU0: 00(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
APIC error on CPU0: 40(40), Received illegal vector
That prevents Xen from booting.
Move the masking of the IO-APIC pins ahead of the setup of the local
APIC. This has the side effect of also moving the detection of the
pin where the i8259 is connected, as such detection must be done
before masking any pins.
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
master commit: 813da5f0e73b8cbd2ac3c7922506e58c28cd736d
master date: 2023-07-17 10:31:10 +0200
---
xen/arch/x86/apic.c | 4 ++++
xen/arch/x86/include/asm/irq.h | 1 +
xen/arch/x86/io_apic.c | 4 +---
xen/arch/x86/smpboot.c | 5 +++++
4 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
index 47e6e5fe41..33103d3e91 100644
--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -1491,6 +1491,10 @@ int __init APIC_init_uniprocessor (void)
physids_clear(phys_cpu_present_map);
physid_set(boot_cpu_physical_apicid, phys_cpu_present_map);
+ if ( !skip_ioapic_setup && nr_ioapics )
+ /* Sanitize the IO-APIC pins before enabling the lapic LVTERR/ESR. */
+ enable_IO_APIC();
+
setup_local_APIC(true);
if (nmi_watchdog == NMI_LOCAL_APIC)
diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h
index 76e6ed6d60..f6a0207a80 100644
--- a/xen/arch/x86/include/asm/irq.h
+++ b/xen/arch/x86/include/asm/irq.h
@@ -122,6 +122,7 @@ bool bogus_8259A_irq(unsigned int irq);
int i8259A_suspend(void);
int i8259A_resume(void);
+void enable_IO_APIC(void);
void setup_IO_APIC(void);
void disable_IO_APIC(void);
void setup_ioapic_dest(void);
diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index 9b8a972cf5..25a08b1ea6 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -1273,7 +1273,7 @@ static void cf_check _print_IO_APIC_keyhandler(unsigned char key)
__print_IO_APIC(0);
}
-static void __init enable_IO_APIC(void)
+void __init enable_IO_APIC(void)
{
int i8259_apic, i8259_pin;
int i, apic;
@@ -2067,8 +2067,6 @@ static void __init ioapic_pm_state_alloc(void)
void __init setup_IO_APIC(void)
{
- enable_IO_APIC();
-
if (acpi_ioapic)
io_apic_irqs = ~0; /* all IRQs go through IOAPIC */
else
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index b46fd9ab18..41ec3211ac 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -1232,6 +1232,11 @@ void __init smp_prepare_cpus(void)
verify_local_APIC();
connect_bsp_APIC();
+
+ if ( !skip_ioapic_setup && nr_ioapics )
+ /* Sanitize the IO-APIC pins before enabling the lapic LVTERR/ESR. */
+ enable_IO_APIC();
+
setup_local_APIC(true);
if ( !skip_ioapic_setup && nr_ioapics )
--
2.42.0
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