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* x86: fold individual Jump* attributes into a single Jump oneJan Beulich2019-11-142-34/+33
* x86: make JumpAbsolute an insn attributeJan Beulich2019-11-142-21/+35
* x86: make AnySize an insn attributeJan Beulich2019-11-141-1/+1
* [gas][arm] Enable VLDM, VSTM, VPUSH, VPOP for MVEMihail Ionescu2019-11-121-44/+65
* [binutils][arm] Update the decoding of MVE VMOV, VMVNMihail Ionescu2019-11-121-2/+0
* [gas][arm] Make .fpu reset the FPU/Coprocessor feature bitsMihail Ionescu2019-11-121-2/+1
* x86: fold EsSeg into IsStringJan Beulich2019-11-121-34/+23
* x86: eliminate ImmExt abuseJan Beulich2019-11-121-48/+2
* x86: introduce operand type "instance"Jan Beulich2019-11-121-29/+44
* i386: Only check suffix in instruction mnemonicH.J. Lu2019-11-081-42/+33
* x86: convert RegMask and RegBND from bitfield to enumeratorJan Beulich2019-11-081-6/+7
* x86: convert RegSIMD and RegMMX from bitfield to enumeratorJan Beulich2019-11-081-43/+45
* x86: convert Control/Debug/Test from bitfield to enumeratorJan Beulich2019-11-081-14/+14
* x86: convert SReg from bitfield to enumeratorJan Beulich2019-11-082-9/+10
* x86: introduce operand type "class"Jan Beulich2019-11-081-41/+59
* [Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10]Matthew Malcomson2019-11-071-4/+83
* [binutils][aarch64] Matrix Multiply extension enablement [8/X]Matthew Malcomson2019-11-071-0/+7
* [Patch][binutils][aarch64] .bfloat16 directive for AArch64 [7/10]Matthew Malcomson2019-11-071-0/+49
* [Patch][binutils][arm] .bfloat16 directive for Arm [6/X]Matthew Malcomson2019-11-071-0/+47
* [Patch][binutils] Generic support for parsing numbers in bfloat16 format [5/X]Matthew Malcomson2019-11-071-29/+54
* [binutils][arm] BFloat16 enablement [4/X]Matthew Malcomson2019-11-071-24/+217
* [binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson2019-11-071-0/+6
* [gas][aarch64] Armv8.6-a option [1/X]Matthew Malcomson2019-11-071-0/+1
* x86: support further AMD Zen2 instructionsJan Beulich2019-11-071-0/+4
* x86: re-arrange process_operands()Jan Beulich2019-11-041-57/+49
* Add support for context sensitive '.arch_extension' to the ARM assembler.Mihail Ionescu2019-10-311-0/+31
* Modify the ARNM assembler to accept the omission of the immediate argument fo...Delia Burduv2019-10-301-15/+29
* x86: drop stray WJan Beulich2019-10-301-5/+6
* Add some missing casts to suppress implicit cast warningsJohn David Anglin2019-10-261-5/+6
* qsort: tc-xtensa.c tidyAlan Modra2019-10-161-22/+26
* remove more xmalloc in bfdAlan Modra2019-10-151-6/+6
* S/390: Add support for z15 as CPU name.Andreas Krebbel2019-10-081-1/+1
* Add support for new functionality in the msp430 backend of GCC.Jozef Lawrynowicz2019-10-071-4/+142
* x86/Intel: correct MOVSD and CMPSD handlingJan Beulich2019-10-071-2/+2
* Arm: Fix out of range conditional branch (PR/24991)Tamar Christina2019-09-241-7/+16
* [ARM]: Modify assembler to accept floating and signless datatypes for MVE ins...Srinath Parvathaneni2019-09-241-5/+5
* ecoff bfd.h tidyAlan Modra2019-09-232-0/+2
* arm bfd.h tidyAlan Modra2019-09-231-0/+1
* tc-i386.c gcc10 warning fixAlan Modra2019-09-211-2/+2
* bfd macro conversion to inline functions, sectionAlan Modra2019-09-201-1/+1
* x86-64: fix handling of PUSH/POP of segment registerJan Beulich2019-09-201-2/+2
* bfd_section_* macrosAlan Modra2019-09-1962-300/+270
* RISC-V: Gate opcode tables by enum rather than string.Jim Wilson2019-09-171-7/+20
* [PATCH][ARM][GAS]: Support to MVE VCTP instruction.Srinath Parvathaneni2019-09-101-0/+41
* PowerPC warning on symbol+offset@gotAlan Modra2019-09-051-3/+3
* [PATCH][ARM][GAS]: Assembler support to interpret MVE VMOV instruction correc...Srinath Parvathaneni2019-08-301-1/+7
* Add support for the MVE VMOV instruction to the ARM assembler. This instruct...Srinath Parvathaneni2019-08-271-2/+4
* RISC-V: Improve li expansion for better code density.Kito Cheng2019-08-251-5/+33
* Arm: Add support for missing CPUsDennis Zhang2019-08-221-0/+9
* Implement a float16 directive for assembling 16 bit IEEE 754 floating point n...Barnaby Wilks2019-08-221-1/+2