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author | 2019-05-21 16:27:28 +0100 | |
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committer | 2019-06-03 07:18:46 +0200 | |
commit | 82cf00c58846058e93b4dc469d1353e254649060 (patch) | |
tree | 7916d6802205e577b8bdde7b7e5ce5c68e8e47ee | |
parent | AArch64: Add SVE DWARF registers (diff) | |
download | binutils-gdb-82cf00c58846058e93b4dc469d1353e254649060.tar.gz binutils-gdb-82cf00c58846058e93b4dc469d1353e254649060.tar.bz2 binutils-gdb-82cf00c58846058e93b4dc469d1353e254649060.zip |
[GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline
gas/ChangeLog:
2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com>
Backport from mainline
2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR24559
* config/tc-arm.c (move_or_literal_pool): Set size_req to 0 for MOVW
replacement.
* testsuite/gas/arm/load-pseudo.s: New test input.
* testsuite/gas/arm/m0-load-pseudo.d: New test.
* testsuite/gas/arm/m23-load-pseudo.d: New test.
* testsuite/gas/arm/m33-load-pseudo.d: New test.
(cherry picked from commit 114c576d1796773456a74d93c7b391279347e117)
Signed-off-by: Andreas K. Hüttel <dilfridge@gentoo.org>
-rw-r--r-- | gas/ChangeLog | 13 | ||||
-rw-r--r-- | gas/config/tc-arm.c | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/load-pseudo.s | 3 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/m0-load-pseudo.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/m23-load-pseudo.d | 12 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/m33-load-pseudo.d | 11 |
6 files changed, 56 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 2b8de267f8e..72fac529637 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,16 @@ +2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> + + Backport from mainline + 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> + + PR24559 + * config/tc-arm.c (move_or_literal_pool): Set size_req to 0 for MOVW + replacement. + * testsuite/gas/arm/load-pseudo.s: New test input. + * testsuite/gas/arm/m0-load-pseudo.d: New test. + * testsuite/gas/arm/m23-load-pseudo.d: New test. + * testsuite/gas/arm/m33-load-pseudo.d: New test. + 2019-04-16 Sudakshina Das <sudi.das@arm.com> Backport from mainline diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index e6600f6b10e..138e377691c 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -8082,6 +8082,11 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3) inst.instruction |= (imm & 0x0800) << 15; inst.instruction |= (imm & 0x0700) << 4; inst.instruction |= (imm & 0x00ff); + /* In case this replacement is being done on Armv8-M + Baseline we need to make sure to disable the + instruction size check, as otherwise GAS will reject + the use of this T32 instruction. */ + inst.size_req = 0; return TRUE; } } diff --git a/gas/testsuite/gas/arm/load-pseudo.s b/gas/testsuite/gas/arm/load-pseudo.s new file mode 100644 index 00000000000..2102522b718 --- /dev/null +++ b/gas/testsuite/gas/arm/load-pseudo.s @@ -0,0 +1,3 @@ +.syntax unified +ldr r0, =(0x30) +ldr r0, =(0x70000000) diff --git a/gas/testsuite/gas/arm/m0-load-pseudo.d b/gas/testsuite/gas/arm/m0-load-pseudo.d new file mode 100644 index 00000000000..cc7e08518ff --- /dev/null +++ b/gas/testsuite/gas/arm/m0-load-pseudo.d @@ -0,0 +1,12 @@ +# name: Load pseudo-operation for Cortex-M0 +# as: -mcpu=cortex-m0 +# objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb +# source: load-pseudo.s + +.*: +file format .*arm.* + + +Disassembly of section .text: +[^>]*> 4800 ldr r0, \[pc, #0\] ; \(00000004 [^>]*>\) +[^>]*> 4801 ldr r0, \[pc, #4\] ; \(00000008 [^>]*>\) +#... diff --git a/gas/testsuite/gas/arm/m23-load-pseudo.d b/gas/testsuite/gas/arm/m23-load-pseudo.d new file mode 100644 index 00000000000..2e0dbe5479b --- /dev/null +++ b/gas/testsuite/gas/arm/m23-load-pseudo.d @@ -0,0 +1,12 @@ +# name: Load pseudo-operation for Cortex-M23 +# as: -mcpu=cortex-m23 +# objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb +# source: load-pseudo.s + +.*: +file format .*arm.* + + +Disassembly of section .text: +[^>]*> f240 0030 movw r0, #48 ; 0x30 +[^>]*> 4800 ldr r0, \[pc, #0\] ; \(00000008 [^>]*>\) +#... diff --git a/gas/testsuite/gas/arm/m33-load-pseudo.d b/gas/testsuite/gas/arm/m33-load-pseudo.d new file mode 100644 index 00000000000..e77bffd0f4d --- /dev/null +++ b/gas/testsuite/gas/arm/m33-load-pseudo.d @@ -0,0 +1,11 @@ +# name: Load pseudo-operation for Cortex-M33 +# as: -mcpu=cortex-m33 +# objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb +# source: load-pseudo.s + +.*: +file format .*arm.* + + +Disassembly of section .text: +[^>]*> f04f 0030 mov.w r0, #48 ; 0x30 +[^>]*> f04f 40e0 mov.w r0, #1879048192 ; 0x70000000 |